BIF_CFG_DEV0_EPF0_1_PMI_STATUS_CNTL__POWER_STATE_MASK 91337 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF0_1_PMI_STATUS_CNTL__POWER_STATE_MASK                                                 0x00000003L
BIF_CFG_DEV0_EPF0_1_PMI_STATUS_CNTL__POWER_STATE_MASK 23401 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF0_1_PMI_STATUS_CNTL__POWER_STATE_MASK                                                 0x00000003L