VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 6701 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 6516 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 6339 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 11813 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x0000001a VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 5308 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 5950 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 6552 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 6430 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 7774 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 7437 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 7864 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_sh_mask.h #define VM_L2_CNTL2__INVALIDATE_CACHE_MODE__SHIFT 0x1a