VGT_DEBUG_REG2__te11_hs_tess_input_rtr_MASK 11890 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define VGT_DEBUG_REG2__te11_hs_tess_input_rtr_MASK 0x00000010L
VGT_DEBUG_REG2__te11_hs_tess_input_rtr_MASK 16867 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define VGT_DEBUG_REG2__te11_hs_tess_input_rtr_MASK 0x10
VGT_DEBUG_REG2__te11_hs_tess_input_rtr_MASK 19177 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define VGT_DEBUG_REG2__te11_hs_tess_input_rtr_MASK 0x10
VGT_DEBUG_REG2__te11_hs_tess_input_rtr_MASK 19779 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define VGT_DEBUG_REG2__te11_hs_tess_input_rtr_MASK 0x10