UVH_GR1_TLB_INT1_CONFIG_T_MASK 375 arch/ia64/include/asm/uv/uv_mmrs.h #define UVH_GR1_TLB_INT1_CONFIG_T_MASK 0x0000000000008000UL UVH_GR1_TLB_INT1_CONFIG_T_MASK 1326 arch/x86/include/asm/uv/uv_mmrs.h #define UVH_GR1_TLB_INT1_CONFIG_T_MASK 0x0000000000008000UL