UVH_GR1_TLB_INT1_CONFIG  362 arch/ia64/include/asm/uv/uv_mmrs.h #define UVH_GR1_TLB_INT1_CONFIG 0x61f40UL
UVH_GR1_TLB_INT1_CONFIG 1307 arch/x86/include/asm/uv/uv_mmrs.h #define UVH_GR1_TLB_INT1_CONFIG (					\