UVH_GR1_TLB_INT0_CONFIG  324 arch/ia64/include/asm/uv/uv_mmrs.h #define UVH_GR1_TLB_INT0_CONFIG 0x61f00UL
UVH_GR1_TLB_INT0_CONFIG 1260 arch/x86/include/asm/uv/uv_mmrs.h #define UVH_GR1_TLB_INT0_CONFIG (					\