UVH_GR0_TLB_INT1_CONFIG_T_MASK 299 arch/ia64/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT1_CONFIG_T_MASK 0x0000000000008000UL UVH_GR0_TLB_INT1_CONFIG_T_MASK 807 arch/x86/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT1_CONFIG_T_MASK 0x0000000000008000UL