UVH_GR0_TLB_INT1_CONFIG_APIC_ID_MASK  303 arch/ia64/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT1_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
UVH_GR0_TLB_INT1_CONFIG_APIC_ID_MASK  809 arch/x86/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT1_CONFIG_APIC_ID_MASK		0xffffffff00000000UL