UVH_GR0_TLB_INT0_CONFIG_VECTOR_MASK  251 arch/ia64/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT0_CONFIG_VECTOR_MASK 0x00000000000000ffUL
UVH_GR0_TLB_INT0_CONFIG_VECTOR_MASK  763 arch/x86/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT0_CONFIG_VECTOR_MASK		0x00000000000000ffUL