UVH_GR0_TLB_INT0_CONFIG_M_MASK  263 arch/ia64/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT0_CONFIG_M_MASK 0x0000000000010000UL
UVH_GR0_TLB_INT0_CONFIG_M_MASK  769 arch/x86/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT0_CONFIG_M_MASK			0x0000000000010000UL