UVH_GR0_TLB_INT0_CONFIG_DM_MASK  253 arch/ia64/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT0_CONFIG_DM_MASK 0x0000000000000700UL
UVH_GR0_TLB_INT0_CONFIG_DM_MASK  764 arch/x86/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT0_CONFIG_DM_MASK			0x0000000000000700UL