UVH_GR0_TLB_INT0_CONFIG_APIC_ID_MASK  265 arch/ia64/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT0_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
UVH_GR0_TLB_INT0_CONFIG_APIC_ID_MASK  770 arch/x86/include/asm/uv/uv_mmrs.h #define UVH_GR0_TLB_INT0_CONFIG_APIC_ID_MASK		0xffffffff00000000UL