UVD_VCPU_CNTL__TRCE_EN__SHIFT  789 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_VCPU_CNTL__TRCE_EN__SHIFT 0x0000000a
UVD_VCPU_CNTL__TRCE_EN__SHIFT  550 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_VCPU_CNTL__TRCE_EN__SHIFT 0xa
UVD_VCPU_CNTL__TRCE_EN__SHIFT  582 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_VCPU_CNTL__TRCE_EN__SHIFT 0xa
UVD_VCPU_CNTL__TRCE_EN__SHIFT  584 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_VCPU_CNTL__TRCE_EN__SHIFT 0xa
UVD_VCPU_CNTL__TRCE_EN__SHIFT 2744 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_VCPU_CNTL__TRCE_EN__SHIFT                                                                         0xa
UVD_VCPU_CNTL__TRCE_EN__SHIFT 2748 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_VCPU_CNTL__TRCE_EN__SHIFT                                                                         0xa