UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT  590 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT 0x11
UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT  592 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT 0x11
UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT 1185 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT                                                         0x11
UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT 2747 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_VCPU_CNTL__MIF_WR_LOW_THRESHOLD_BP__SHIFT                                                         0x11