UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4_MASK  762 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4_MASK 0x00000010L
UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4_MASK  537 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4_MASK 0x10
UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4_MASK  569 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4_MASK 0x10
UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4_MASK  571 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_VCPU_CNTL__AXI_MAX_BRST_SIZE_IS_4_MASK 0x10