UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 756 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 0x001fffffL UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 529 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 0x1fffff UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 561 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 0x1fffff UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 563 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 0x1fffff UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 656 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 0x001FFFFFL UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 1176 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 0x001FFFFFL UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 2682 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 0x001FFFFFL UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 2686 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_VCPU_CACHE_SIZE1__CACHE_SIZE1_MASK 0x001FFFFFL