UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK  754 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x001fffffL
UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK  525 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x1fffff
UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK  557 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x1fffff
UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK  559 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 0x1fffff
UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK  650 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK                                                                0x001FFFFFL
UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 1170 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK                                                                0x001FFFFFL
UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 2676 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK                                                                0x001FFFFFL
UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK 2680 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_VCPU_CACHE_SIZE0__CACHE_SIZE0_MASK                                                                0x001FFFFFL