UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT  753 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x00000000
UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT  532 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x0
UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT  564 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x0
UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT  566 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 0x0
UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT  658 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT                                                          0x0
UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 1178 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT                                                          0x0
UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 2684 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT                                                          0x0
UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT 2688 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2__SHIFT                                                          0x0