UVD_UDEC_DBW_ADDR_CONFIG__NUM_RB_PER_SE_MASK 202 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_UDEC_DBW_ADDR_CONFIG__NUM_RB_PER_SE_MASK 0x0C000000L UVD_UDEC_DBW_ADDR_CONFIG__NUM_RB_PER_SE_MASK 424 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_UDEC_DBW_ADDR_CONFIG__NUM_RB_PER_SE_MASK 0x0C000000L