UVD_SUVD_CGC_STATUS__UVD_SC__SHIFT  784 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__UVD_SC__SHIFT 0xf
UVD_SUVD_CGC_STATUS__UVD_SC__SHIFT  495 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__UVD_SC__SHIFT                                                                    0xf
UVD_SUVD_CGC_STATUS__UVD_SC__SHIFT 3251 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__UVD_SC__SHIFT                                                                    0xf
UVD_SUVD_CGC_STATUS__UVD_SC__SHIFT 2125 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_SUVD_CGC_STATUS__UVD_SC__SHIFT                                                                    0xf