UVD_SUVD_CGC_STATUS__UVD_SC_MASK  783 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__UVD_SC_MASK 0x8000
UVD_SUVD_CGC_STATUS__UVD_SC_MASK  523 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__UVD_SC_MASK                                                                      0x00008000L
UVD_SUVD_CGC_STATUS__UVD_SC_MASK 3280 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__UVD_SC_MASK                                                                      0x00008000L
UVD_SUVD_CGC_STATUS__UVD_SC_MASK 2154 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_SUVD_CGC_STATUS__UVD_SC_MASK                                                                      0x00008000L