UVD_SUVD_CGC_STATUS__SIT_DCLK__SHIFT  758 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__SIT_DCLK__SHIFT 0x2
UVD_SUVD_CGC_STATUS__SIT_DCLK__SHIFT  756 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__SIT_DCLK__SHIFT 0x2
UVD_SUVD_CGC_STATUS__SIT_DCLK__SHIFT  482 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__SIT_DCLK__SHIFT                                                                  0x2
UVD_SUVD_CGC_STATUS__SIT_DCLK__SHIFT 3238 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__SIT_DCLK__SHIFT                                                                  0x2
UVD_SUVD_CGC_STATUS__SIT_DCLK__SHIFT 2112 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_SUVD_CGC_STATUS__SIT_DCLK__SHIFT                                                                  0x2