UVD_SUVD_CGC_STATUS__SITE_HEVC_ENC_DCLK_MASK  530 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__SITE_HEVC_ENC_DCLK_MASK                                                          0x00400000L
UVD_SUVD_CGC_STATUS__SITE_HEVC_ENC_DCLK_MASK 3287 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__SITE_HEVC_ENC_DCLK_MASK                                                          0x00400000L
UVD_SUVD_CGC_STATUS__SITE_HEVC_ENC_DCLK_MASK 2161 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_SUVD_CGC_STATUS__SITE_HEVC_ENC_DCLK_MASK                                                          0x00400000L