UVD_SUVD_CGC_STATUS__IME_DCLK__SHIFT 497 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__IME_DCLK__SHIFT 0x11 UVD_SUVD_CGC_STATUS__IME_DCLK__SHIFT 3253 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_SUVD_CGC_STATUS__IME_DCLK__SHIFT 0x11 UVD_SUVD_CGC_STATUS__IME_DCLK__SHIFT 2127 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_SUVD_CGC_STATUS__IME_DCLK__SHIFT 0x11