UVD_SUVD_CGC_GATE__SRE_MASK  723 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_SUVD_CGC_GATE__SRE_MASK 0x1
UVD_SUVD_CGC_GATE__SRE_MASK  725 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_SUVD_CGC_GATE__SRE_MASK 0x1
UVD_SUVD_CGC_GATE__SRE_MASK  226 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_SUVD_CGC_GATE__SRE_MASK                                                                           0x00000001L
UVD_SUVD_CGC_GATE__SRE_MASK  454 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_SUVD_CGC_GATE__SRE_MASK                                                                           0x00000001L
UVD_SUVD_CGC_GATE__SRE_MASK 3209 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_SUVD_CGC_GATE__SRE_MASK                                                                           0x00000001L
UVD_SUVD_CGC_GATE__SRE_MASK 2083 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_SUVD_CGC_GATE__SRE_MASK                                                                           0x00000001L