UVD_SUVD_CGC_GATE__SDB_HEVC_MASK  747 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_SUVD_CGC_GATE__SDB_HEVC_MASK 0x1000
UVD_SUVD_CGC_GATE__SDB_HEVC_MASK  749 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_SUVD_CGC_GATE__SDB_HEVC_MASK 0x1000
UVD_SUVD_CGC_GATE__SDB_HEVC_MASK  238 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_SUVD_CGC_GATE__SDB_HEVC_MASK                                                                      0x00001000L
UVD_SUVD_CGC_GATE__SDB_HEVC_MASK  466 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_SUVD_CGC_GATE__SDB_HEVC_MASK                                                                      0x00001000L
UVD_SUVD_CGC_GATE__SDB_HEVC_MASK 3221 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_SUVD_CGC_GATE__SDB_HEVC_MASK                                                                      0x00001000L
UVD_SUVD_CGC_GATE__SDB_HEVC_MASK 2095 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_SUVD_CGC_GATE__SDB_HEVC_MASK                                                                      0x00001000L