UVD_STATUS__RBC_ACCESS_GPCOM__SHIFT  760 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_STATUS__RBC_ACCESS_GPCOM__SHIFT                                                                   0x10
UVD_STATUS__RBC_ACCESS_GPCOM__SHIFT 1287 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_STATUS__RBC_ACCESS_GPCOM__SHIFT                                                                   0x10
UVD_STATUS__RBC_ACCESS_GPCOM__SHIFT 2911 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_STATUS__RBC_ACCESS_GPCOM__SHIFT                                                                   0x10
UVD_STATUS__RBC_ACCESS_GPCOM__SHIFT 1736 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_STATUS__RBC_ACCESS_GPCOM__SHIFT                                                                   0x10