UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT  627 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT 0x00000001
UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT  112 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT 0x1
UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT  124 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT 0x1
UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT  126 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT 0x1
UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT  341 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT                                                               0x1
UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT  702 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT                                                               0x1
UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT 1738 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT                                                               0x1
UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT 2985 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_SEMA_CNTL__ADVANCED_MODE_DIS__SHIFT                                                               0x1