UVD_SEMA_CMD__MODE__SHIFT  617 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_SEMA_CMD__MODE__SHIFT 0x00000006
UVD_SEMA_CMD__MODE__SHIFT   36 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_SEMA_CMD__MODE__SHIFT 0x6
UVD_SEMA_CMD__MODE__SHIFT   36 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_SEMA_CMD__MODE__SHIFT 0x6
UVD_SEMA_CMD__MODE__SHIFT   36 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_SEMA_CMD__MODE__SHIFT 0x6
UVD_SEMA_CMD__MODE__SHIFT  294 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_SEMA_CMD__MODE__SHIFT                                                                             0x6
UVD_SEMA_CMD__MODE__SHIFT 3154 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_SEMA_CMD__MODE__SHIFT                                                                             0x6
UVD_SEMA_CMD__MODE__SHIFT 2953 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_SEMA_CMD__MODE__SHIFT                                                                             0x6