UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER__SHIFT  732 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER__SHIFT                                                       0x0
UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER__SHIFT 1256 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER__SHIFT                                                       0x0
UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER__SHIFT 2871 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER__SHIFT                                                       0x0
UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER__SHIFT 2937 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_RBC_RB_WPTR_CNTL__RB_PRE_WRITE_TIMER__SHIFT                                                       0x0