UVD_RBC_IB_SIZE__IB_SIZE__SHIFT  591 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_RBC_IB_SIZE__IB_SIZE__SHIFT 0x00000004
UVD_RBC_IB_SIZE__IB_SIZE__SHIFT  608 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_RBC_IB_SIZE__IB_SIZE__SHIFT 0x4
UVD_RBC_IB_SIZE__IB_SIZE__SHIFT  670 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_RBC_IB_SIZE__IB_SIZE__SHIFT 0x4
UVD_RBC_IB_SIZE__IB_SIZE__SHIFT  672 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_RBC_IB_SIZE__IB_SIZE__SHIFT 0x4
UVD_RBC_IB_SIZE__IB_SIZE__SHIFT  723 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_RBC_IB_SIZE__IB_SIZE__SHIFT                                                                       0x4
UVD_RBC_IB_SIZE__IB_SIZE__SHIFT 1247 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_RBC_IB_SIZE__IB_SIZE__SHIFT                                                                       0x4
UVD_RBC_IB_SIZE__IB_SIZE__SHIFT 2859 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_RBC_IB_SIZE__IB_SIZE__SHIFT                                                                       0x4
UVD_RBC_IB_SIZE__IB_SIZE__SHIFT 2903 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_RBC_IB_SIZE__IB_SIZE__SHIFT                                                                       0x4