UVD_PGFSM_STATUS__UVDC_PWR_STATUS_MASK   64 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_PGFSM_STATUS__UVDC_PWR_STATUS_MASK                                                                0x000000C0L
UVD_PGFSM_STATUS__UVDC_PWR_STATUS_MASK 1500 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_PGFSM_STATUS__UVDC_PWR_STATUS_MASK                                                                0x000000C0L
UVD_PGFSM_STATUS__UVDC_PWR_STATUS_MASK 1503 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_PGFSM_STATUS__UVDC_PWR_STATUS_MASK                                                                0x000000C0L