UVD_PGFSM_STATUS__UVDB_PWR_STATUS_MASK   65 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_PGFSM_STATUS__UVDB_PWR_STATUS_MASK                                                                0x00000300L
UVD_PGFSM_STATUS__UVDB_PWR_STATUS_MASK 1501 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_PGFSM_STATUS__UVDB_PWR_STATUS_MASK                                                                0x00000300L
UVD_PGFSM_STATUS__UVDB_PWR_STATUS_MASK 1504 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_PGFSM_STATUS__UVDB_PWR_STATUS_MASK                                                                0x00000300L