UVD_MPC_CNTL__PERF_RST__SHIFT  487 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_MPC_CNTL__PERF_RST__SHIFT 0x00000006
UVD_MPC_CNTL__PERF_RST__SHIFT  474 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_MPC_CNTL__PERF_RST__SHIFT 0x6
UVD_MPC_CNTL__PERF_RST__SHIFT  506 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_MPC_CNTL__PERF_RST__SHIFT 0x6
UVD_MPC_CNTL__PERF_RST__SHIFT  508 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_MPC_CNTL__PERF_RST__SHIFT 0x6
UVD_MPC_CNTL__PERF_RST__SHIFT 2596 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_MPC_CNTL__PERF_RST__SHIFT                                                                         0x6
UVD_MPC_CNTL__PERF_RST__SHIFT 2831 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_MPC_CNTL__PERF_RST__SHIFT                                                                         0x6