UVD_MPC_CNTL__DBG_MUX__SHIFT  485 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_MPC_CNTL__DBG_MUX__SHIFT 0x00000008
UVD_MPC_CNTL__DBG_MUX__SHIFT  476 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_MPC_CNTL__DBG_MUX__SHIFT 0x8
UVD_MPC_CNTL__DBG_MUX__SHIFT  508 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_MPC_CNTL__DBG_MUX__SHIFT 0x8
UVD_MPC_CNTL__DBG_MUX__SHIFT  510 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_MPC_CNTL__DBG_MUX__SHIFT 0x8