UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES__SHIFT  473 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES__SHIFT 0x00000000
UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES__SHIFT  764 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES__SHIFT 0x0
UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES__SHIFT  974 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES__SHIFT 0x0
UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES__SHIFT  962 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES__SHIFT 0x0