UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES_MASK  472 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES_MASK 0x00000007L
UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES_MASK  763 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES_MASK 0x7
UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES_MASK  973 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES_MASK 0x7
UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES_MASK  961 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_MIF_REF_ADDR_CONFIG__NUM_PIPES_MASK 0x7