UVD_MIF_RECON1_ADDR_CONFIG__NUM_PIPES__SHIFT  455 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_MIF_RECON1_ADDR_CONFIG__NUM_PIPES__SHIFT 0x00000000
UVD_MIF_RECON1_ADDR_CONFIG__NUM_PIPES__SHIFT  782 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_MIF_RECON1_ADDR_CONFIG__NUM_PIPES__SHIFT 0x0
UVD_MIF_RECON1_ADDR_CONFIG__NUM_PIPES__SHIFT  992 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_MIF_RECON1_ADDR_CONFIG__NUM_PIPES__SHIFT 0x0
UVD_MIF_RECON1_ADDR_CONFIG__NUM_PIPES__SHIFT  980 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_MIF_RECON1_ADDR_CONFIG__NUM_PIPES__SHIFT 0x0