UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT  411 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT 0x00000004
UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT  414 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT 0x4
UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT  446 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT 0x4
UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT  448 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT 0x4
UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT  536 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT                                                             0x4
UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT 1071 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT                                                             0x4
UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT 2510 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_LMI_SWAP_CNTL__RB_RPTR_MC_SWAP__SHIFT                                                             0x4