UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT  375 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT 0x0000000a
UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT  402 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT 0xa
UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT  434 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT 0xa
UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT  436 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT 0xa
UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT 2439 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT                                                                   0xa
UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT 3390 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_LMI_STATUS__UMC_UVD_IDLE__SHIFT                                                                   0xa