UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT  369 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT 0x0000000b
UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT  404 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT 0xb
UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT  436 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT 0xb
UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT  438 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT 0xb
UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT 2440 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT                                                                   0xb
UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT 3391 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE__SHIFT                                                                   0xb