UVD_LMI_STATUS__UMC_AVP_IDLE_MASK  368 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 0x00000800L
UVD_LMI_STATUS__UMC_AVP_IDLE_MASK  403 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 0x800
UVD_LMI_STATUS__UMC_AVP_IDLE_MASK  435 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 0x800
UVD_LMI_STATUS__UMC_AVP_IDLE_MASK  437 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 0x800
UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 2459 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK                                                                     0x00000800L
UVD_LMI_STATUS__UMC_AVP_IDLE_MASK 3410 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_LMI_STATUS__UMC_AVP_IDLE_MASK                                                                     0x00000800L