UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT  349 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT 0x00000008
UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT  352 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT 0x8
UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT  384 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT 0x8
UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT  386 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT 0x8
UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT  506 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT                                                             0x8
UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT 1028 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT                                                             0x8
UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT 2397 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT                                                             0x8
UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT 3348 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN__SHIFT                                                             0x8