UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT  317 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT 0x0000000e
UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT  318 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT 0xe
UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT  350 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT 0xe
UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT  352 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT 0xe
UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT 2059 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT                                                                 0xe
UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT 3297 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_LMI_CTRL2__VCPU_NC1_EXT_EN__SHIFT                                                                 0xe