UVD_LMI_CTRL2__SPH_DIS__SHIFT 307 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_LMI_CTRL2__SPH_DIS__SHIFT 0x00000000 UVD_LMI_CTRL2__SPH_DIS__SHIFT 298 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_LMI_CTRL2__SPH_DIS__SHIFT 0x0 UVD_LMI_CTRL2__SPH_DIS__SHIFT 330 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_LMI_CTRL2__SPH_DIS__SHIFT 0x0 UVD_LMI_CTRL2__SPH_DIS__SHIFT 332 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_LMI_CTRL2__SPH_DIS__SHIFT 0x0 UVD_LMI_CTRL2__SPH_DIS__SHIFT 468 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_LMI_CTRL2__SPH_DIS__SHIFT 0x0 UVD_LMI_CTRL2__SPH_DIS__SHIFT 985 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_LMI_CTRL2__SPH_DIS__SHIFT 0x0 UVD_LMI_CTRL2__SPH_DIS__SHIFT 2049 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_LMI_CTRL2__SPH_DIS__SHIFT 0x0 UVD_LMI_CTRL2__SPH_DIS__SHIFT 3287 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_LMI_CTRL2__SPH_DIS__SHIFT 0x0