UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK  296 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK 0x00000080L
UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK  307 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK 0x80
UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK  339 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK 0x80
UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK  341 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK 0x80
UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK  480 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK                                                             0x00000080L
UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK  998 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK                                                             0x00000080L
UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK 2071 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK                                                             0x00000080L
UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK 3309 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_LMI_CTRL2__DRCITF_BUBBLE_FIX_DIS_MASK                                                             0x00000080L