UVD_JRBC_RB_BUF_STATUS__RB_BUF_WR_ADDR_MASK  770 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_JRBC_RB_BUF_STATUS__RB_BUF_WR_ADDR_MASK                                                           0x03000000L
UVD_JRBC_RB_BUF_STATUS__RB_BUF_WR_ADDR_MASK  773 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_JRBC_RB_BUF_STATUS__RB_BUF_WR_ADDR_MASK                                                           0x03000000L