UVD_ENC_PIPE_BUSY__MIF_WR_BSP2_BUSY__SHIFT 3646 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_ENC_PIPE_BUSY__MIF_WR_BSP2_BUSY__SHIFT                                                            0x1d
UVD_ENC_PIPE_BUSY__MIF_WR_BSP2_BUSY__SHIFT 1768 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_ENC_PIPE_BUSY__MIF_WR_BSP2_BUSY__SHIFT                                                            0x1d