UVD_ENC_PIPE_BUSY__MIF_WR_BSP2_BUSY_MASK 3673 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_ENC_PIPE_BUSY__MIF_WR_BSP2_BUSY_MASK 0x20000000L UVD_ENC_PIPE_BUSY__MIF_WR_BSP2_BUSY_MASK 1795 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_ENC_PIPE_BUSY__MIF_WR_BSP2_BUSY_MASK 0x20000000L