UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT   95 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT                                                               0x10
UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT 1551 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT                                                               0x10
UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT 1554 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT                                                               0x10